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This is mostly a maintenance update that brings the compressor inline with the recently published Khronos Data Format Specification 1.4 release which clarified some ambiguity in the specification. This update also gives minor codec optimizations, bug fixes, and image quality improvements. The biggest improvement for Godot is that builds using MSVC cl.exe will now correctly default to the SSE2-optimized backend rather than the reference C backend. This makes compression more than 3 times faster. Builds using other compilers (GCC, LLVM/Clang) were not impacted by the underlying issue, and see no performance uplift.
506 lines
11 KiB
C++
506 lines
11 KiB
C++
// SPDX-License-Identifier: Apache-2.0
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// ----------------------------------------------------------------------------
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// Copyright 2011-2025 Arm Limited
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//
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// Licensed under the Apache License, Version 2.0 (the "License"); you may not
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// use this file except in compliance with the License. You may obtain a copy
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// of the License at:
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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// License for the specific language governing permissions and limitations
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// under the License.
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// ----------------------------------------------------------------------------
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/*
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* This module implements a variety of mathematical data types and library
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* functions used by the codec.
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*/
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#ifndef ASTC_MATHLIB_H_INCLUDED
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#define ASTC_MATHLIB_H_INCLUDED
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#include <cassert>
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#include <cstdint>
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#include <cmath>
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#ifndef ASTCENC_POPCNT
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#if defined(__POPCNT__)
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#define ASTCENC_POPCNT 1
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#else
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#define ASTCENC_POPCNT 0
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#endif
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#endif
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#ifndef ASTCENC_F16C
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#if defined(__F16C__)
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#define ASTCENC_F16C 1
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#else
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#define ASTCENC_F16C 0
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#endif
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#endif
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#ifndef ASTCENC_SSE
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#if defined(__SSE4_2__)
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#define ASTCENC_SSE 42
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#elif defined(__SSE4_1__)
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#define ASTCENC_SSE 41
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#elif defined(__SSE2__) || (defined(_M_AMD64) && !defined(_M_ARM64EC))
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#define ASTCENC_SSE 20
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#else
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#define ASTCENC_SSE 0
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#endif
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#endif
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#ifndef ASTCENC_AVX
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#if defined(__AVX2__)
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#define ASTCENC_AVX 2
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#define ASTCENC_X86_GATHERS 1
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#elif defined(__AVX__)
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#define ASTCENC_AVX 1
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#define ASTCENC_X86_GATHERS 1
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#else
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#define ASTCENC_AVX 0
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#endif
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#endif
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#ifndef ASTCENC_NEON
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#if defined(__aarch64__) || defined(_M_ARM64) || defined(_M_ARM64EC)
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#define ASTCENC_NEON 1
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#else
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#define ASTCENC_NEON 0
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#endif
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#endif
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#ifndef ASTCENC_SVE
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#if defined(__ARM_FEATURE_SVE)
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#if defined(__ARM_FEATURE_SVE_BITS) && __ARM_FEATURE_SVE_BITS == 256
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#define ASTCENC_SVE 8
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// Auto-detected SVE can only assume vector width of 4 is available, but
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// must also allow for hardware being longer and so all use of intrinsics
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// must explicitly use predicate masks to limit to 4-wide.
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#else
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#define ASTCENC_SVE 4
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#endif
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#else
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#define ASTCENC_SVE 0
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#endif
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#endif
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// Force vector-sized SIMD alignment
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#if ASTCENC_AVX || ASTCENC_SVE == 8
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#define ASTCENC_VECALIGN 32
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#elif ASTCENC_SSE || ASTCENC_NEON || ASTCENC_SVE == 4
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#define ASTCENC_VECALIGN 16
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// Use default alignment for non-SIMD builds
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#else
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#define ASTCENC_VECALIGN 0
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#endif
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// C++11 states that alignas(0) should be ignored but GCC doesn't do
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// this on some versions, so workaround and avoid emitting alignas(0)
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#if ASTCENC_VECALIGN > 0
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#define ASTCENC_ALIGNAS alignas(ASTCENC_VECALIGN)
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#else
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#define ASTCENC_ALIGNAS
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#endif
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#if ASTCENC_SSE != 0 || ASTCENC_AVX != 0 || ASTCENC_POPCNT != 0
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#include <immintrin.h>
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#endif
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/* ============================================================================
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Fast math library; note that many of the higher-order functions in this set
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use approximations which are less accurate, but faster, than <cmath> standard
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library equivalents.
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Note: Many of these are not necessarily faster than simple C versions when
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used on a single scalar value, but are included for testing purposes as most
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have an option based on SSE intrinsics and therefore provide an obvious route
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to future vectorization.
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============================================================================ */
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// Union for manipulation of float bit patterns
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typedef union
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{
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uint32_t u;
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int32_t s;
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float f;
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} if32;
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// These are namespaced to avoid colliding with C standard library functions.
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namespace astc
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{
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static const float PI = 3.14159265358979323846f;
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static const float PI_OVER_TWO = 1.57079632679489661923f;
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/**
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* @brief SP float absolute value.
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*
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* @param v The value to make absolute.
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*
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* @return The absolute value.
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*/
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static inline float fabs(float v)
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{
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return std::fabs(v);
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}
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/**
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* @brief Test if a float value is a nan.
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*
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* @param v The value test.
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*
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* @return Zero is not a NaN, non-zero otherwise.
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*/
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static inline bool isnan(float v)
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{
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return v != v;
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}
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/**
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* @brief Return the minimum of two values.
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*
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* For floats, NaNs are turned into @c q.
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*
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* @param p The first value to compare.
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* @param q The second value to compare.
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*
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* @return The smallest value.
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*/
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template<typename T>
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static inline T min(T p, T q)
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{
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return p < q ? p : q;
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}
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/**
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* @brief Return the minimum of three values.
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*
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* For floats, NaNs are turned into @c r.
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*
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* @param p The first value to compare.
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* @param q The second value to compare.
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* @param r The third value to compare.
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*
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* @return The smallest value.
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*/
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template<typename T>
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static inline T min(T p, T q, T r)
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{
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return min(min(p, q), r);
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}
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/**
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* @brief Return the minimum of four values.
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*
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* For floats, NaNs are turned into @c s.
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*
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* @param p The first value to compare.
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* @param q The second value to compare.
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* @param r The third value to compare.
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* @param s The fourth value to compare.
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*
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* @return The smallest value.
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*/
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template<typename T>
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static inline T min(T p, T q, T r, T s)
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{
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return min(min(p, q), min(r, s));
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}
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/**
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* @brief Return the maximum of two values.
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*
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* For floats, NaNs are turned into @c q.
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*
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* @param p The first value to compare.
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* @param q The second value to compare.
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*
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* @return The largest value.
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*/
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template<typename T>
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static inline T max(T p, T q)
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{
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return p > q ? p : q;
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}
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/**
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* @brief Return the maximum of three values.
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*
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* For floats, NaNs are turned into @c r.
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*
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* @param p The first value to compare.
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* @param q The second value to compare.
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* @param r The third value to compare.
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*
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* @return The largest value.
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*/
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template<typename T>
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static inline T max(T p, T q, T r)
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{
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return max(max(p, q), r);
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}
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/**
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* @brief Return the maximum of four values.
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*
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* For floats, NaNs are turned into @c s.
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*
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* @param p The first value to compare.
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* @param q The second value to compare.
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* @param r The third value to compare.
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* @param s The fourth value to compare.
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*
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* @return The largest value.
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*/
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template<typename T>
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static inline T max(T p, T q, T r, T s)
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{
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return max(max(p, q), max(r, s));
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}
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/**
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* @brief Clamp a value value between @c mn and @c mx.
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*
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* For floats, NaNs are turned into @c mn.
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*
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* @param v The value to clamp.
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* @param mn The min value (inclusive).
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* @param mx The max value (inclusive).
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*
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* @return The clamped value.
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*/
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template<typename T>
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inline T clamp(T v, T mn, T mx)
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{
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// Do not reorder; correct NaN handling relies on the fact that comparison
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// with NaN returns false and will fall-though to the "min" value.
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if (v > mx) return mx;
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if (v > mn) return v;
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return mn;
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}
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/**
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* @brief Clamp a float value between 0.0f and 1.0f.
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*
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* NaNs are turned into 0.0f.
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*
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* @param v The value to clamp.
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*
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* @return The clamped value.
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*/
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static inline float clamp1f(float v)
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{
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return astc::clamp(v, 0.0f, 1.0f);
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}
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/**
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* @brief Clamp a float value between 0.0f and 255.0f.
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*
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* NaNs are turned into 0.0f.
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*
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* @param v The value to clamp.
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*
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* @return The clamped value.
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*/
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static inline float clamp255f(float v)
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{
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return astc::clamp(v, 0.0f, 255.0f);
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}
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/**
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* @brief SP float round-down.
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*
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* @param v The value to round.
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*
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* @return The rounded value.
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*/
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static inline float flt_rd(float v)
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{
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return std::floor(v);
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}
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/**
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* @brief SP float round-to-nearest and convert to integer.
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*
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* @param v The value to round.
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*
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* @return The rounded value.
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*/
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static inline int flt2int_rtn(float v)
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{
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return static_cast<int>(v + 0.5f);
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}
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/**
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* @brief SP float round down and convert to integer.
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*
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* @param v The value to round.
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*
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* @return The rounded value.
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*/
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static inline int flt2int_rd(float v)
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{
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return static_cast<int>(v);
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}
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/**
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* @brief SP float bit-interpreted as an integer.
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*
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* @param v The value to bitcast.
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*
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* @return The converted value.
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*/
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static inline int float_as_int(float v)
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{
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union { int a; float b; } u;
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u.b = v;
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return u.a;
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}
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/**
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* @brief Integer bit-interpreted as an SP float.
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*
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* @param v The value to bitcast.
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*
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* @return The converted value.
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*/
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static inline float int_as_float(int v)
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{
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union { int a; float b; } u;
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u.a = v;
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return u.b;
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}
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/**
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* @brief Fast approximation of 1.0 / sqrt(val).
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*
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* @param v The input value.
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*
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* @return The approximated result.
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*/
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static inline float rsqrt(float v)
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{
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return 1.0f / std::sqrt(v);
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}
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/**
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* @brief Fast approximation of sqrt(val).
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*
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* @param v The input value.
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*
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* @return The approximated result.
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*/
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static inline float sqrt(float v)
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{
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return std::sqrt(v);
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}
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/**
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* @brief Extract mantissa and exponent of a float value.
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*
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* @param v The input value.
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* @param[out] expo The output exponent.
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*
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* @return The mantissa.
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*/
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static inline float frexp(float v, int* expo)
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{
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if32 p;
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p.f = v;
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*expo = ((p.u >> 23) & 0xFF) - 126;
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p.u = (p.u & 0x807fffff) | 0x3f000000;
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return p.f;
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}
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/**
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* @brief Initialize the seed structure for a random number generator.
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*
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* Important note: For the purposes of ASTC we want sets of random numbers to
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* use the codec, but we want the same seed value across instances and threads
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* to ensure that image output is stable across compressor runs and across
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* platforms. Every PRNG created by this call will therefore return the same
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* sequence of values ...
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*
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* @param state The state structure to initialize.
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*/
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void rand_init(uint64_t state[2]);
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/**
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* @brief Return the next random number from the generator.
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*
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* This RNG is an implementation of the "xoroshoro-128+ 1.0" PRNG, based on the
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* public-domain implementation given by David Blackman & Sebastiano Vigna at
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* http://vigna.di.unimi.it/xorshift/xoroshiro128plus.c
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*
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* @param state The state structure to use/update.
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*/
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uint64_t rand(uint64_t state[2]);
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}
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/* ============================================================================
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Softfloat library with fp32 and fp16 conversion functionality.
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============================================================================ */
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#if (ASTCENC_F16C == 0) && (ASTCENC_NEON == 0)
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/* narrowing float->float conversions */
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uint16_t float_to_sf16(float val);
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float sf16_to_float(uint16_t val);
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#endif
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/*********************************
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Vector library
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*********************************/
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#include "astcenc_vecmathlib.h"
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/*********************************
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Declaration of line types
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*********************************/
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// parametric line, 2D: The line is given by line = a + b * t.
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struct line2
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{
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vfloat4 a;
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vfloat4 b;
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};
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// parametric line, 3D
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struct line3
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{
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vfloat4 a;
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vfloat4 b;
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};
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struct line4
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{
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vfloat4 a;
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vfloat4 b;
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};
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struct processed_line2
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{
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vfloat4 amod;
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vfloat4 bs;
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};
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struct processed_line3
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{
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vfloat4 amod;
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vfloat4 bs;
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};
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struct processed_line4
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{
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vfloat4 amod;
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vfloat4 bs;
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};
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#endif
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