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Update libwebp to 0.6.1
* lossless performance and compression improvements + a new 'cruncher' mode (-m 6 -q 100) * ARM performance improvements with clang (15-20% w/ndk r15c) * webp-js: emscripten/webassembly based javascript decoder * miscellaneous bug & build fixes
This commit is contained in:
volzhs
182
thirdparty/libwebp/src/dsp/alpha_processing_mips_dsp_r2.c
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182
thirdparty/libwebp/src/dsp/alpha_processing_mips_dsp_r2.c
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// Copyright 2014 Google Inc. All Rights Reserved.
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//
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// Use of this source code is governed by a BSD-style license
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// that can be found in the COPYING file in the root of the source
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// tree. An additional intellectual property rights grant can be found
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// in the file PATENTS. All contributing project authors may
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// be found in the AUTHORS file in the root of the source tree.
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// -----------------------------------------------------------------------------
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//
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// Utilities for processing transparent channel.
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//
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// Author(s): Branimir Vasic (branimir.vasic@imgtec.com)
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// Djordje Pesut (djordje.pesut@imgtec.com)
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#include "src/dsp/dsp.h"
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#if defined(WEBP_USE_MIPS_DSP_R2)
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static int DispatchAlpha_MIPSdspR2(const uint8_t* alpha, int alpha_stride,
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int width, int height,
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uint8_t* dst, int dst_stride) {
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uint32_t alpha_mask = 0xffffffff;
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int i, j, temp0;
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for (j = 0; j < height; ++j) {
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uint8_t* pdst = dst;
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const uint8_t* palpha = alpha;
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for (i = 0; i < (width >> 2); ++i) {
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int temp1, temp2, temp3;
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__asm__ volatile (
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"ulw %[temp0], 0(%[palpha]) \n\t"
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"addiu %[palpha], %[palpha], 4 \n\t"
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"addiu %[pdst], %[pdst], 16 \n\t"
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"srl %[temp1], %[temp0], 8 \n\t"
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"srl %[temp2], %[temp0], 16 \n\t"
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"srl %[temp3], %[temp0], 24 \n\t"
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"and %[alpha_mask], %[alpha_mask], %[temp0] \n\t"
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"sb %[temp0], -16(%[pdst]) \n\t"
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"sb %[temp1], -12(%[pdst]) \n\t"
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"sb %[temp2], -8(%[pdst]) \n\t"
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"sb %[temp3], -4(%[pdst]) \n\t"
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: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),
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[temp3]"=&r"(temp3), [palpha]"+r"(palpha), [pdst]"+r"(pdst),
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[alpha_mask]"+r"(alpha_mask)
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:
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: "memory"
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);
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}
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for (i = 0; i < (width & 3); ++i) {
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__asm__ volatile (
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"lbu %[temp0], 0(%[palpha]) \n\t"
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"addiu %[palpha], %[palpha], 1 \n\t"
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"sb %[temp0], 0(%[pdst]) \n\t"
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"and %[alpha_mask], %[alpha_mask], %[temp0] \n\t"
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"addiu %[pdst], %[pdst], 4 \n\t"
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: [temp0]"=&r"(temp0), [palpha]"+r"(palpha), [pdst]"+r"(pdst),
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[alpha_mask]"+r"(alpha_mask)
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:
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: "memory"
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);
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}
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alpha += alpha_stride;
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dst += dst_stride;
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}
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__asm__ volatile (
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"ext %[temp0], %[alpha_mask], 0, 16 \n\t"
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"srl %[alpha_mask], %[alpha_mask], 16 \n\t"
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"and %[alpha_mask], %[alpha_mask], %[temp0] \n\t"
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"ext %[temp0], %[alpha_mask], 0, 8 \n\t"
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"srl %[alpha_mask], %[alpha_mask], 8 \n\t"
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"and %[alpha_mask], %[alpha_mask], %[temp0] \n\t"
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: [temp0]"=&r"(temp0), [alpha_mask]"+r"(alpha_mask)
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:
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);
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return (alpha_mask != 0xff);
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}
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static void MultARGBRow_MIPSdspR2(uint32_t* const ptr, int width,
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int inverse) {
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int x;
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const uint32_t c_00ffffff = 0x00ffffffu;
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const uint32_t c_ff000000 = 0xff000000u;
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const uint32_t c_8000000 = 0x00800000u;
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const uint32_t c_8000080 = 0x00800080u;
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for (x = 0; x < width; ++x) {
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const uint32_t argb = ptr[x];
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if (argb < 0xff000000u) { // alpha < 255
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if (argb <= 0x00ffffffu) { // alpha == 0
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ptr[x] = 0;
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} else {
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int temp0, temp1, temp2, temp3, alpha;
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__asm__ volatile (
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"srl %[alpha], %[argb], 24 \n\t"
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"replv.qb %[temp0], %[alpha] \n\t"
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"and %[temp0], %[temp0], %[c_00ffffff] \n\t"
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"beqz %[inverse], 0f \n\t"
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"divu $zero, %[c_ff000000], %[alpha] \n\t"
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"mflo %[temp0] \n\t"
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"0: \n\t"
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"andi %[temp1], %[argb], 0xff \n\t"
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"ext %[temp2], %[argb], 8, 8 \n\t"
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"ext %[temp3], %[argb], 16, 8 \n\t"
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"mul %[temp1], %[temp1], %[temp0] \n\t"
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"mul %[temp2], %[temp2], %[temp0] \n\t"
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"mul %[temp3], %[temp3], %[temp0] \n\t"
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"precrq.ph.w %[temp1], %[temp2], %[temp1] \n\t"
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"addu %[temp3], %[temp3], %[c_8000000] \n\t"
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"addu %[temp1], %[temp1], %[c_8000080] \n\t"
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"precrq.ph.w %[temp3], %[argb], %[temp3] \n\t"
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"precrq.qb.ph %[temp1], %[temp3], %[temp1] \n\t"
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: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),
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[temp3]"=&r"(temp3), [alpha]"=&r"(alpha)
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: [inverse]"r"(inverse), [c_00ffffff]"r"(c_00ffffff),
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[c_8000000]"r"(c_8000000), [c_8000080]"r"(c_8000080),
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[c_ff000000]"r"(c_ff000000), [argb]"r"(argb)
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: "memory", "hi", "lo"
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);
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ptr[x] = temp1;
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}
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}
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}
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}
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static void PackRGB_MIPSdspR2(const uint8_t* r, const uint8_t* g,
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const uint8_t* b, int len, int step,
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uint32_t* out) {
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int temp0, temp1, temp2, offset;
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const int rest = len & 1;
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const int a = 0xff;
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const uint32_t* const loop_end = out + len - rest;
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__asm__ volatile (
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"xor %[offset], %[offset], %[offset] \n\t"
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"beq %[loop_end], %[out], 0f \n\t"
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"2: \n\t"
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"lbux %[temp0], %[offset](%[r]) \n\t"
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"lbux %[temp1], %[offset](%[g]) \n\t"
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"lbux %[temp2], %[offset](%[b]) \n\t"
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"ins %[temp0], %[a], 16, 16 \n\t"
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"ins %[temp2], %[temp1], 16, 16 \n\t"
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"addiu %[out], %[out], 4 \n\t"
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"precr.qb.ph %[temp0], %[temp0], %[temp2] \n\t"
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"sw %[temp0], -4(%[out]) \n\t"
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"addu %[offset], %[offset], %[step] \n\t"
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"bne %[loop_end], %[out], 2b \n\t"
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"0: \n\t"
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"beq %[rest], $zero, 1f \n\t"
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"lbux %[temp0], %[offset](%[r]) \n\t"
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"lbux %[temp1], %[offset](%[g]) \n\t"
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"lbux %[temp2], %[offset](%[b]) \n\t"
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"ins %[temp0], %[a], 16, 16 \n\t"
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"ins %[temp2], %[temp1], 16, 16 \n\t"
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"precr.qb.ph %[temp0], %[temp0], %[temp2] \n\t"
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"sw %[temp0], 0(%[out]) \n\t"
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"1: \n\t"
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: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),
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[offset]"=&r"(offset), [out]"+&r"(out)
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: [a]"r"(a), [r]"r"(r), [g]"r"(g), [b]"r"(b), [step]"r"(step),
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[loop_end]"r"(loop_end), [rest]"r"(rest)
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: "memory"
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);
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}
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//------------------------------------------------------------------------------
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// Entry point
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extern void WebPInitAlphaProcessingMIPSdspR2(void);
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WEBP_TSAN_IGNORE_FUNCTION void WebPInitAlphaProcessingMIPSdspR2(void) {
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WebPDispatchAlpha = DispatchAlpha_MIPSdspR2;
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WebPMultARGBRow = MultARGBRow_MIPSdspR2;
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WebPPackRGB = PackRGB_MIPSdspR2;
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}
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#else // !WEBP_USE_MIPS_DSP_R2
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WEBP_DSP_INIT_STUB(WebPInitAlphaProcessingMIPSdspR2)
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#endif // WEBP_USE_MIPS_DSP_R2
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